Real-time SSVEP measurements through Lock-in detection in FPGA-based platform

In this work, a method for measuring steady-state visually evoked potentials using the Lock-In technique is presented. The proposed method in- volves acquiring the electroencephalography signal through channel averaging from an ADS1299 sigma-delta converter, without the need for additional hardware...

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Guardado en:
Detalles Bibliográficos
Autores principales: Oliva, Matías Javier, Guerrero, Federico Nicolás, García, Pablo Andrés, Spinelli, Enrique Mario
Formato: Objeto de conferencia
Lenguaje:Inglés
Publicado: 2023
Materias:
Ingeniería
SSVEP
FPGA
EEG
Lock-in
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/160849
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata

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