Dealing with practical limitations of distributed timed model checking for timed automata

Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or predecessors. Both usually work with a data structure called Difference Bound Matrices (DBMs). Although forward is better...

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Autor principal: Braberman, V.
Otros Autores: Olivero, A., Schapachnik, F.
Formato: Capítulo de libro
Lenguaje:Inglés
Publicado: 2006
Acceso en línea:Registro en Scopus
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100 1 |a Braberman, V. 
245 1 0 |a Dealing with practical limitations of distributed timed model checking for timed automata 
260 |c 2006 
270 1 0 |m Braberman, V.; Departamento de Computación, FCEyN, Universidad de Buenos Aires, Buenos Aires, Argentina; email: vbraber@dc.uba.ar 
506 |2 openaire  |e Política editorial 
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504 |a Braberman, V., Olivero, A., Schapachnik, F., Issues in distributed model-checking of timed automata: Building ZEUS (2004) Int J Softw Tools Technol Transf P. Online First 
504 |a Braberman, V., Olivero, A., Schapachnik, F., On-the-fly workload prediction and redistribution in the distributed timed model checker ZEUS (2004) 3rd International Workshop on Parallel and Distributed Methods in Verification, , Affiliated to CONCUR 2004 (15th International Conference on Concurrency Theory London, UK 
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504 |a Grumberg, O., Heyman, T., Schuster, A., Distributed symbolic model checking for μ.-calculus (2001) Computer Aided Verification, pp. 350-362 
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504 |a Schapachnik, F., (2002) Distributed and Parallel Verification of Real-time Systems, , Degree thesis, Departamento de Computación, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires 
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520 3 |a Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or predecessors. Both usually work with a data structure called Difference Bound Matrices (DBMs). Although forward is better suited for on-the-fly construction of the model, the one known as backwards provides the basis for the verification of arbitrary formulae of the TCTL logic, and more importantly, for controller synthesis. Zeus is a distributed model checker for timed automata that uses the backwards algorithm. It works assigning each automata location to only one processor. This design choice seems the only reasonable way to deal with some complex operations involving many DBMs in order to avoid huge overheads due to distribution. This article explores the limitations of Zeus-like approaches for the distribution of timed model checkers. Our findings justify why close-to-linear speedups are so difficult -and sometimes impossible- to achieve in the general case. Nevertheless, we present mechanisms based on the way model checking is usually applied. Among others, these include model-topology-aware partitioning and on-the-fly workload redistribution. Combined, they have a positive impact on the speedups obtained.  |l eng 
536 |a Detalles de la financiación: Inter-American Development Bank, OC/AR PICT 11738 
536 |a Detalles de la financiación: Secretaría de Ciencia y Técnica, Universidad de Buenos Aires, 2004 X020 
536 |a Detalles de la financiación: Consejo Nacional de Investigaciones Científicas y Técnicas 
536 |a Detalles de la financiación: PI0509, TSI04B 
536 |a Detalles de la financiación: 2005 
536 |a Detalles de la financiación: This research paper supported by BID OC/AR PICT 11738 grant. 
536 |a Detalles de la financiación: V. Braberman: Research supported by UBACyT 2004 X020 and CONICET. 
536 |a Detalles de la financiación: A. Olivero: Partially supported by UADE projects TSI04B and PI0509. 
536 |a Detalles de la financiación: F. Schapachnik: Partially supported by an IDS 2003 grant and IBM Eclipse innovation award 2005. 
593 |a Departamento de Computación, FCEyN, Universidad de Buenos Aires, Buenos Aires, Argentina 
593 |a Centro de Estudios Avanzados, FIyCE, Universidad Argentina de la Empresa, Buenos Aires, Argentina 
690 1 0 |a DBM 
690 1 0 |a DISTRIBUTED TIMED MODEL CHECKING 
690 1 0 |a KRONOS 
690 1 0 |a LOAD-BALANCE 
690 1 0 |a REACHABILITY 
690 1 0 |a RECONFIGURATION 
690 1 0 |a REDISTRIBUTION 
690 1 0 |a TIMED AUTOMATA 
690 1 0 |a ZEUS 
690 1 0 |a ALGORITHMS 
690 1 0 |a CONTROL EQUIPMENT 
690 1 0 |a DATA STRUCTURES 
690 1 0 |a FORMAL LOGIC 
690 1 0 |a PROGRAM PROCESSORS 
690 1 0 |a TOPOLOGY 
690 1 0 |a DIFFERENCE BOUND MATRICES (DBM) 
690 1 0 |a DISTRIBUTED TIMED MODEL CHECKING 
690 1 0 |a KRONOS 
690 1 0 |a LOAD-BALANCE 
690 1 0 |a REACHABILITY 
690 1 0 |a RECONFIGURATION 
690 1 0 |a REDISTRIBUTION 
690 1 0 |a TIMED AUTOMATA 
690 1 0 |a ZEUS 
690 1 0 |a AUTOMATA THEORY 
700 1 |a Olivero, A. 
700 1 |a Schapachnik, F. 
773 0 |d 2006  |g v. 29  |h pp. 197-214  |k n. 2  |p Formal Methods Syst Des  |x 09259856  |t Formal Methods in System Design 
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