Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP

Operational consoles, human-machine interfaces implemented in Surface Units of the Naval Fleet Command, facilitate the visualization of critical data and system management through operator command input. However, their operability and upgrade potential are restricted by dependence on proprietary har...

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Autores principales: Gallo, Emiliano Sebastián, Cayssials, Ricardo Luis, Galasso, Christian Luis, Arias, Alan Emir
Formato: Artículo publishedVersion
Lenguaje:Español
Publicado: FIUBA 2025
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Acceso en línea:https://elektron.fi.uba.ar/elektron/article/view/220
https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=220_oai
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spelling I28-R145-220_oai2026-02-11 Gallo, Emiliano Sebastián Cayssials, Ricardo Luis Galasso, Christian Luis Arias, Alan Emir 2025-12-15 Operational consoles, human-machine interfaces implemented in Surface Units of the Naval Fleet Command, facilitate the visualization of critical data and system management through operator command input. However, their operability and upgrade potential are restricted by dependence on proprietary hardware. This report describes a component of a broader project whose purpose is to replace the "Optronic Sensor Control Console" (CCSO) with a commercial computer (PC). This modernization seeks to adapt the system to new operational demands, enable the incorporation of new functionalities, and eliminate dependence on proprietary components. This article specifically addresses the operational logic of a Daisy Chain topology, used as an interconnection strategy between devices. Its concept, digital implementation in VHDL, and validation through a SystemVerilog testbench are presented, highlighting its role in the proposed architecture. Las consolas de operaciones, interfaces de interacción humana implementadas en las Unidades de Superficie del Comando de la Flota Naval, facilitan la visualización de datos críticos y la gestión de sistemas mediante la entrada de comandos por parte de los operadores. Sin embargo, su operatividad y potencial de actualización están restringidos por la dependencia de hardware propietario. Este informe describe un componente de un proyecto más amplio cuyo propósito es sustituir la “Consola de Control de Sensor Optrónico” (CCSO) por una computadora comercial (PC). Esta modernización busca adaptar el sistema a nuevas demandas operativas, permitir la incorporación de nuevas funcionalidades y eliminar la dependencia de componentes propietarios. En este artículo se aborda específicamente la lógica de funcionamiento de una topología Daisy Chain, utilizada como estrategia de interconexión entre dispositivos. Se presenta su concepto, su implementación digital en VHDL y la validación mediante un testbench en SystemVerilog, destacando su rol en la arquitectura propuesta. application/pdf text/html https://elektron.fi.uba.ar/elektron/article/view/220 10.37537/rev.elektron.9.2.220.2025 spa FIUBA https://elektron.fi.uba.ar/elektron/article/view/220/395 https://elektron.fi.uba.ar/elektron/article/view/220/406 Derechos de autor 2025 Emiliano Sebastián Gallo Elektron Journal; Vol. 9 No. 2 (2025); 56-67 Revista Elektron; Vol. 9 Núm. 2 (2025); 56-67 Revista Elektron; v. 9 n. 2 (2025); 56-67 2525-0159 2525-0159 Daisy Chain digital design FPGA modernization VHDL Daisy Chain diseño digital FPGA modernización VHDL Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP Topología Daisy Chain en FPGA para modernización naval: implementación y extensión con ARP info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=220_oai
institution Universidad de Buenos Aires
institution_str I-28
repository_str R-145
collection Repositorio Digital de la Universidad de Buenos Aires (UBA)
language Español
orig_language_str_mv spa
topic Daisy Chain
digital design
FPGA
modernization
VHDL
Daisy Chain
diseño digital
FPGA
modernización
VHDL
spellingShingle Daisy Chain
digital design
FPGA
modernization
VHDL
Daisy Chain
diseño digital
FPGA
modernización
VHDL
Gallo, Emiliano Sebastián
Cayssials, Ricardo Luis
Galasso, Christian Luis
Arias, Alan Emir
Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
topic_facet Daisy Chain
digital design
FPGA
modernization
VHDL
Daisy Chain
diseño digital
FPGA
modernización
VHDL
description Operational consoles, human-machine interfaces implemented in Surface Units of the Naval Fleet Command, facilitate the visualization of critical data and system management through operator command input. However, their operability and upgrade potential are restricted by dependence on proprietary hardware. This report describes a component of a broader project whose purpose is to replace the "Optronic Sensor Control Console" (CCSO) with a commercial computer (PC). This modernization seeks to adapt the system to new operational demands, enable the incorporation of new functionalities, and eliminate dependence on proprietary components. This article specifically addresses the operational logic of a Daisy Chain topology, used as an interconnection strategy between devices. Its concept, digital implementation in VHDL, and validation through a SystemVerilog testbench are presented, highlighting its role in the proposed architecture.
format Artículo
publishedVersion
author Gallo, Emiliano Sebastián
Cayssials, Ricardo Luis
Galasso, Christian Luis
Arias, Alan Emir
author_facet Gallo, Emiliano Sebastián
Cayssials, Ricardo Luis
Galasso, Christian Luis
Arias, Alan Emir
author_sort Gallo, Emiliano Sebastián
title Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
title_short Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
title_full Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
title_fullStr Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
title_full_unstemmed Daisy Chain Topology on FPGA for naval modernization: implementation and extension with ARP
title_sort daisy chain topology on fpga for naval modernization: implementation and extension with arp
publisher FIUBA
publishDate 2025
url https://elektron.fi.uba.ar/elektron/article/view/220
https://repositoriouba.sisbi.uba.ar/gsdl/cgi-bin/library.cgi?a=d&c=elektron&d=220_oai
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