Cita APA (7a ed.)

Gallo, E. S., Cayssials, R. L., Galasso, C. L., & Arias, A. E. (2025). Daisy Chain Topology on FPGA for naval modernization: Implementation and extension with ARP. FIUBA.

Cita Chicago Style (17a ed.)

Gallo, Emiliano Sebastián, Ricardo Luis Cayssials, Christian Luis Galasso, y Alan Emir Arias. Daisy Chain Topology on FPGA for Naval Modernization: Implementation and Extension with ARP. FIUBA, 2025.

Cita MLA (8a ed.)

Gallo, Emiliano Sebastián, et al. Daisy Chain Topology on FPGA for Naval Modernization: Implementation and Extension with ARP. FIUBA, 2025.